A conventional associative memory has storage cells divided into an associative area and a storage area. The writing of information into an associative memory is made without address. The cell area is commonly arranged as shift registers.
The computer was invented during the 1940:s. Since then it has been developed with a revolutionary speed. In spite of this it is hard to understand that current days computers have almost the same architecture as the first ones.
Most improvements have been in the hardware. The introduction of VLSI and the enhancement in lithography has made it possible to build computers on chips that five years ago were super computers. The dimensions have shrunk exponentially and the line width is now less than 1 micrometer. The clock rate as well as the number of active transistors have increased many orders of magnitude. Physical limitations will limit the line width to 0.2 micrometer.
During the same time the computer architectures have not improved in the use of silicon. On the contrary, most computers have been using more than optimal amount of silicon in order to be faster. Both these facts will stop the evolution of the speed of single processors in the next five years. Parallel processors are introduced at an increased price of the hardware because of rising complexity and, for most types of programs, a prohibitive increase of programming costs.
Seen in relation to each other, the hardware costs have shrunk but the programming costs of new systems have grown considerably and will coon be at a prohibitive level--there are not enough programmers in the world.
A computer is a complicated assembly of different units of software and hardware. Different paradigms and stages in the evolution have created standards--ad hoc and established--that are spread throughout the system. Because of this nonuniformity there are a great number of interfaces.
All these interfaces and paradigms of different quality have created a very great complexity.
Recently however so-called reduction processors are developing. A reduction processor includes an active storage, in which a program having a certain structure including arithmetic expressions is stored, and this structure is reduced in a number of reduction steps. Thus, the program is not executed in a given sequence as in other kinds of computers.
There have been some difficulties in developing reduction processors above a limited size.